20 beste Stellen als software test engineer in zug zg – aktuell auf Personalsuche

Senior Compiler Engineer
Synthara AG —Zürich, ZH
- C++
- Python
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Decentriq —Zürich, ZH
- Teilzeit
- Hybrides Arbeiten
- Doktorat
- Master
- Bachelor
Direkt bewerben
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- Englisch
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Optiml —Zürich, ZH
- Überstunden
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ALSTOM —Zürich, ZH
- Englisch
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Climeworks —Zürich, ZH
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Senior Security Software Engineer, Linux Kernel Security - Nodes & Sensors
Anthropic —Zürich, ZH
- Bereitschaftsdienst
- C++
- Bachelor
- Linux
- Eltern-/Erziehungsurlaub
Technical Product Manager QVAC - 100% remote
Tether Operations Limited —Zürich, ZH
- Homeoffice
- Englisch
- C++
- Bachelor
Coherent Intern Pipeline
Coherent Corp. —Zürich, ZH
- 100%
- Englisch
- Master
- Bachelor
Energetic Systems Qualification Engineer
Destinus —Zürich, ZH
- Hybrides Arbeiten
- Englisch
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- Bachelor
Direkt bewerben
22 Std.
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Destinus —Zürich, ZH
- 100%
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EPAM Systems, Inc. —Zürich, ZH
- Englisch
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- Eltern-/Erziehungsurlaub
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Destinus —Zürich, ZH
- 100%
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Gravis Robotics —Zürich, ZH
- 100%
- Doktorat
- Englisch
- Master
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Neura Robotics GmbH —Zürich, ZH
- 100%
- Doktorat
- Master
11 Tage
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Auterion —Zürich, ZH
- Master
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Global Technical Sales / Sales Channel Manager
Schmid & Partner Engineering —Zürich, ZH
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Senior Electric Motor Design Engineer - Humanoid (Mensch)
Neura Robotics —Zürich, ZH
- 100%
- Doktorat
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Direkt bewerben
11 Tage

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Senior Compiler Engineer

Synthara AG
Zürich, ZH

Jetzt bewerben

Details zur Stelle

Qualifikationen

C++
GitHub
Python

Vollständige Stellenbeschreibung

Role

Location: Zürich, Switzerland
Seniority: 5+ years (systems, compilers, or embedded)

Join the core software team that turns ComputeRAM® into something developers love to use. You will design and ship a software integration kit, build the software library components that sit between applications and hardware, develop compiler passes that lower NN/DSP ops to our primitives, and own a solid benchmarking pipeline. You will work closely with silicon and equally closely with users, moving from prototype to production with clean code, clear documentation, and measurable speed and energy gains.

What you’ll do

Design and implement embedded software libraries and low-level runtime for ComputeRAM-enabled platforms.
Develop and maintain the compiler path (MLIR/LLVM passes, code generation, kernels) that maps AI and DSP primitives and related operations to our hardware.
Develop and refine a benchmarking and profiling framework that incorporates reproducible tests, dashboards, and regression gates.
Strengthen build, test, and CI so releases are predictable and artifacts are easy to consume.
Collaborate with hardware, architecture, and customer-facing teams; write precise specs and documentation; turn feedback into roadmap items.

Outcomes (first 18 months)

A production-ready driver + runtime stack for at least one MCU target and one accelerator-class target.
A working compiler path with visible wins in latency and energy on representative models, documented end-to-end.
A stable benchmark suite with automated reports and performance guards integrated in CI.
Developer-quality docs, examples, and reference projects that make first use smooth for partners.

Requirements

5+ years building low-level software or compilers; strong C++ and Python; you have shipped production code.
Hands-on experience with embedded systems and compiler design
Solid systems understanding. memory and concurrency fundamentals
Comfortable reading hardware datasheets and working at the HW/SW boundary.
Evidence of performance work (profiling, tracing, optimization) on embedded or accelerator targets.
Clear writing, good documentation habits, and a collaborative approach.

Nice to have

Experience deploying deep-learning workloads on edge devices; familiarity with TensorFlow Lite for Micro, TVM, or IREE.
HPC exposure (DirectML, OpenCL, CUDA) or DSP algorithm implementations.
CI/CD depth and packaging for developer kits, utilizing GitHub Actions or a similar tool.
Quantization and fixed-point experience for edge inference.

Apply

Send your CV and a short note (2–3 paragraphs on a design you owned, your toughest bug & how you solved it, an intro on what you like to do and how you see yourself as an engineer)

Interview flow (indicative)

30-min intro with HR (role/context)

First Technical deep dive

Second Technical Deep Dive

(Optional) Third Technical Deep Dive

Systems/product conversation with management

Jetzt bewerben

Erweiterte Suche

software test engineer Jobs in zug zg

Senior Compiler Engineer

Senior Software Engineer - Distributed Systems

Electronic Design Engineering, Senior

Senior Signal Processing Engineer

DevOps Engineer /Deployment Manager

Infrastructure Engineer (GCP & Platform)

Electrical Engineer for Converter Engineering (f/m/d) 80-100%

Senior Development Engineer (80-100%)

Senior Security Software Engineer, Linux Kernel Security - Nodes & Sensors

Technical Product Manager QVAC - 100% remote

Coherent Intern Pipeline

Energetic Systems Qualification Engineer

GNC Engineer

OMS Lead Engineer

Chief Engineer

Mid / Senior SLAM Engineer

Senior Electric Motor Design Engineer - Humanoid (Mensch)

System Engineer

Global Technical Sales / Sales Channel Manager

Senior Electric Motor Design Engineer - Humanoid (Mensch)

Ich möchte aktuelle Job-E-Mails für Stellen als software test engineer in zug zg erhalten

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What you’ll do

Outcomes (first 18 months)

Requirements

Nice to have

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