7 beste Stellen als python in dintikon ag – aktuell auf Personalsuche

Lead Custom Design Engineer
Synthara AG —Zürich, ZH
- Doktorat
- Master
- Mentoring
Senior Technical Consultant Omada/IGA (m/f/d)
SECURIX AG Schweiz —Olten, SO
- Homeoffice
- Management-Erfahrung
- Englisch
- Scripting
- Pensionskasse
Business Risk Manager – Global Products & Solutions (GPS) 80% - 100% (f/m/d)
Julius Baer —Zürich, ZH
- Datenanalyse
- SQL
- Analysefähigkeit
7 Tage
(Senior) Software Systems Engineer Web Security
Open Systems AG —Zürich, ZH
- 100%
- Hybrides Arbeiten
- Informatik
- Englisch
- C++
Direkt bewerben
Cloud & Network Security Service Owner (Engineer)
Avaloq —Zürich, ZH
- 100%
- Hybrides Arbeiten
- Oracle
- Englisch
- Kommunikationsfähigkeit
Direkt bewerben
Senior Data Engineer – Data Analytics Platform 80-100% (f/m/d) - (Contract through our external payroll partner with immediate start for 12 months with possible extension)
Julius Baer —Zürich, ZH
- Management-Erfahrung
- Datenanalyse
- Systemdesign
Senior Java Engineer – HPC Cluster Development & Maintenance, 100% (f/m/d)
Julius Baer —Zürich, ZH
- 100%
- Englisch
- Java
- C++

Discover related jobs

Based on your search for python jobs.

Analyst Service Performance (m/w/d) 100%
AMAG Group —Cham, ZG
Für die Abteilung Technical Services am Hauptsitz in Cham ZG suchen wir ab sofort oder nach Vereinbarung eine analytische und umsetzungsstarke Persönlichkeit,…
3 Std.
IT Support Analyst (w/m/d) - onsite
NTT Ltd —Rotkreuz, ZG
Resolution of hardware driver conflicts, user profile corruption, and operating system errors (Mac OSX and Windows 7 10).

Ich möchte aktuelle Job-E-Mails für Stellen als python in dintikon ag erhalten

Wenn Sie sich bei Ihrem Konto anmelden, stimmen Sie den Nutzungsbedingungen, den Richtlinien zur Verwendung von Cookies sowie der Datenschutzerklärung von SimplyHired zu.

Weitere Job-Standorte erkunden

python jobs near dintikon ag

Jobs als Risk Manager in Zürich, ZH

Jobs als Senior System Engineer in Zürich, ZH

Jobs als Senior Java Developer in Zürich, ZH

Jobs als Lead Designer in Zürich, ZH

Jobs als Data Engineer in Zürich, ZH

Jobs als Risk Manager in Lugano, Ti

Jobs als Risk Manager in Canton De Genève

Jobs als Risk Manager in Zug, Zg

Jobs als Risk Manager in Geneva, Ge

Jobs als Product Manager Google in Zürich, Zh

Jobs als Event Manager in Luzern, Lu

Jobs als Network Security Engineer in Basel, Bs

Jobs als Network Security Engineer in Genève, Ge

Jobs als Engineer in Kanton Basel Stadt

Jobs als Ai Engineer in Lausanne, Vd

Jobs als Medical Engineer in Zürich, Zh

Jobs als Network Security Engineer in Geneva, Ge

Jobs als Production Engineer in Zürich, Zh

Jobs als Senior System Engineer in Luzern, Lu

Jobs als Senior Business Analyst in Zürich, Zh

Lead Custom Design Engineer

Synthara AG
Zürich, ZH

Jetzt bewerben

Details zur Stelle

Qualifikationen

Doktorat
Master
Mentoring
Führungserfahrung
Python

Vollständige Stellenbeschreibung

Role

Location: Zürich, Switzerland
Seniority: 7+ years (custom digital, analog, or memory), team leadership

Lead the development of high-performance, custom based digital compute or SRAM memory designs to power our compute-in-memory SRAM (ComputeRAM®). You will own architecture, circuit design, verification, and silicon correlation for advanced nodes down to 5 nm and below, and you will lead a small team of custom designers and layout engineers to predictable, production-grade outcomes. Expect hands-on work on bitcell-adjacent periphery, datapath interfaces, optimizing data movement, as well as tight collaboration with full-custom layout, digital, backend, DFT, and test.

What you’ll do

Own the product roadmap: define specs, PPA targets, verification depth, and quality bars for new SRAM variants and CxR-adjacent custom blocks.
Design & verify memory or datapath subsystems, including sense amps, data drivers, multipliers, adders, register files, timing/control FSMs, etc..
Engineer for advanced nodes: close on variation (corners, Monte-Carlo), stability, noise/IR drop, device reliability, and wake-up/low-power behaviors in FinFET and FDSOI.
Integrate for product: define clean digital boundaries (standard-cell and bus interfaces), latency/handshake contracts, and timing budgets so blocks drop into a digital-on-top mixed-signal flow.
Silicon correlation: plan bring-up, build characterization benches, analyze ATE data, and publish correlation and errata with clear fixes.
Redundancy & test: specify and validate redundancy/repair schemes; work with DFT (MBIST and Scan) test coverage; sign off on a production test plan.
Partner with layout: co-plan floorplans, matching/guarding, shielding, and routing topologies; review extraction and fix EM/IR issues early.
Elevate method & team: coach designers, run reviews, enforce checklists, and grow automation (Python/Tcl) for regressions, reporting, and collateral generation.

Outcomes (first 18 months)

Tape-in and silicon of at least one production-grade CxR custom memory block meeting spec across PVT, with signed correlation and test reports.
A reusable design kit (models, constraints, verification plans, char scripts, checklists) that shortens the following variant’s cycle time.
A high-functioning custom team with clear ownership (periphery, timing/control, modeling, characterization) and reliable delivery metrics.
Quantified PPA and yield gains from design or methodology improvements you led.

Requirements

MS or PhD in Electrical/Computer Engineering (or similar) and 7+ years in custom digital, memory, or analog design.
Track record of end-to-end ownership of production-grade functional blocks, including sign-off and silicon correlation.
Deep understanding of high-performance and low-power circuit design on FinFET nodes (stability, variation, leakage, performance).
Experience leading a small team (mentoring, reviews, planning) and coordinating tightly with layout, digital, backend, DFT, and test.
Clear communication, structured documentation, and a quality-first mindset.

Nice to have

Scripting for design and characterization automation (Python, Tcl) and model/report generation.
Experience with memory compilers, characterization flows, and verification environments.
DTCO/STCO exposure to align device, bitcell, and periphery choices with product goals.
Background with production test strategies.
Familiarity with compute-in-memory constraints and with integrating custom memory into large digital systems.

Apply

Send your CV and a short note (2–3 paragraphs on a design you owned, your toughest bug & how you solved it, an intro on what you like to do and how you see yourself as an engineer)

Interview flow (indicative)

30-min intro with HR (role/context)

First Technical deep dive

Second Technical Deep Dive

(Optional) Third Technical Deep Dive

Systems/product conversation with management

Jetzt bewerben

Erweiterte Suche

python Jobs in dintikon ag

Lead Custom Design Engineer

Senior Technical Consultant Omada/IGA (m/f/d)

Business Risk Manager – Global Products & Solutions (GPS) 80% - 100% (f/m/d)

(Senior) Software Systems Engineer Web Security

Cloud & Network Security Service Owner (Engineer)

Senior Data Engineer – Data Analytics Platform 80-100% (f/m/d) - (Contract through our external payroll partner with immediate start for 12 months with possible extension)

Senior Java Engineer – HPC Cluster Development & Maintenance, 100% (f/m/d)

Discover related jobs

Ich möchte aktuelle Job-E-Mails für Stellen als python in dintikon ag erhalten

Related Searches

Weitere Job-Standorte erkunden

Role

What you’ll do

Outcomes (first 18 months)

Requirements

Nice to have

Apply

Interview flow (indicative)

Tools für Jobsuchende

Arbeitgebertools

Durchsuchen

Bleiben Sie in Kontakt